At present, various types of semiconductor memory devices are available. Among various types of semiconductor memory devices, a DRAM (Dynamic Random Access Memory) is widely used. Many of DRAMs are of a synchronous type that inputs and outputs data synchronously with a clock signal, and can perform a random access in a cycle of about 7 ns.
However, the DRAM is a volatile memory, and data stored in the DRAM is lost when a power supply is disconnected. Therefore, the DRAM is not suitable to store programs and archival data to be stored in a long term. During a power supply on period, a periodical refresh operation is necessary so as to prevent stored data from disappearing. Therefore, there is a limit to a reduction of power consumption, and a complex control with a controller is necessary.
A flash memory is known as a large-capacity nonvolatile semiconductor memory. However, the flash memory requires a large current to write data or delete data. Further, the flash memory has a disadvantage in that a writing time or a deleting time is very long compared with a DRAM. Therefore, it is inappropriate to use a flash memory as a main memory. While other nonvolatile memories such as an MRAM (Magnetoresistive Random Access Memory) and an FRAM (Ferroelectric Random Access Memory) are also proposed, it is difficult to obtain a memory capacity equivalent to that of the DRAM from these nonvolatile memories.
On the other hand, a PRAM (Phase change Random Access Memory) using a phase-change material as recording material has been proposed as a semiconductor memory replacing the RRAM (see Japanese Patent Application Laid-open Nos. 2006-24355, 2005-158199, 2006-31795, and 2006-294181). The PRAM stores data based on a state of a phase of a phase-change material included in a recording layer. That is, because the phase-change material has a large difference between electric resistance in a crystal phase and electric resistance in an amorphous phase, the phase-change material can store data using this difference.
A phase state is changed by passing a writing current to a phase-change material, thereby heating the phase-change material. On the other hand, a data reading is performed by passing a reading current to the phase-change material, and measuring a resistance value thereof. A reading current is set to a sufficiently smaller value than the writing current to avoid generating a phase change. Therefore, the PRAM can perform nondestructive reading unlike the DRAM. Because the phase state of the phase-change material does not change unless a high heat is applied, data is not lost even when the power supply is disconnected.
Because the DRAM is a semiconductor memory device of a voltage-sensing type, data is read by amplifying a potential difference generated in a bit line pair by a sense amplifier. On the other hand, because the PRAM is a semiconductor memory device of a current-sensing type, in the data reading time, it is necessary to convert the held content to a potential difference by passing a reading current to the memory cell, and further amplify the potential difference.
Therefore, a circuit scale of the sense amplifier of the PRAM is inevitably much larger than that of the sense amplifier of the DRAM. In the PRAM, consequently, it is not reasonable to provide a sense amplifier for each bit line like in the DRAM. Therefore, it becomes necessary to share one sense amplifier with plural bit lines. More realistically, it is considered appropriate to layout one sense amplifier for plural cell arrays.
However, when plural bit lines share one sense amplifier, a capacitance of bit lines from the viewpoint of the sense amplifier becomes very large, and there occurs a problem that a sensing operation takes long time. Therefore, the data reading cycle becomes substantially longer than that of the DRAM, and it becomes impossible to keep compatibility between the PRAM and the DRAM.
This problem similarly occurs not only in the PRAM but also in other types of semiconductor devices taking a long sensing operation.